Contact me at http://larabell.org/contact/ for more information.
About Me
Computer software engineer with background in hardware design (discrete component level, not ASIC) specializing in Electronic Design Automation (EDA) application development and support.
US citizen currently residing in Tokyo, Japan. Willing to travel but not to relocate.
Native English fluency and reasonably OK in conversational-level Japanese (JLPT2).
- Experience:
- 6.5 years in Hardware Design
- 10.0 years in Applications Engineering
- 27.5 years in Software Development
- Objective:
- Development and/or support work in Electronic Design Automation
- Temporary and/or part-time work OK (contract work also OK)
- Interested in assignment in Tokyo area or remote work
Employment History
- 2006 ~ present
- Principal Engineer
- Siemens EDA / Mentor Graphics
Worked on coverage reporting and testplan tracking tools. Designed and implemented regression management and failure analysis products. Served as principal architect for client-server metrics-based verification tracking product.
- 1998 ~ 2006
- Senior Applications Engineer
- Synopsys
Application support and home-office liason for VCS simulation products. Designed initial testbench architecture for key Vera customers. Designed and implemented a graphical stimulus editor as a one-off for a specific Vera customer.
- 1996 ~ 1998
- Senior Software Engineer / Software Engineering Manager
- Ikos Systems, Inc.
Designed and implementated Verilog-to-Ikos model translation product. Managed work on existing memory model generation product. Worked with CTO to create accelerator -based solutions for several corner-case simulation model scenarios.
- 1995 ~ 1996
- Applications Engineer
- (contract)
- Itochu Technoscience, K.K.
Pre-sales and customer support for Ikos digital accelerator and Verilog/VHDL simulators. Implemented ASIC simulation cell and memory libraries for key customers.
- 1993 ~ 1995
- Manager, CAE Support
- Zuken-Redac, Japan
- (formerly Racal-Redac)
Responsible for support and user migration for CADAT simulation product for Japanese customers after product end-of-life announcement. Provided liason between support staff in Japan and development staff in US/UK.
- 1988 ~ 1993
- Senior Systems Analyst
- Racal-Redac, Inc.
- (formerly HHB Systems)
Continued to support ASIC library generation tools originally produced at FutureNet (see below). Worked on major enhancements to CADAT digital simulatior including design of second-generation ASIC timing database schema.
- 1987 ~ 1988
- Contract Programmer
- 1986 ~ 1987
- Software Engineer
- Data I/O - FutureNet Division
Designed and implemented “Acculib” database-driven ASIC library generation tools. Supported CADAT simulator running on co-processor card for Windows platform.
- 1987 ~ 1987
- Contract Programmer
- 1986 ~ 1987
- Contract Programmer (part time)
- Teledyne Systems
Designed and implemented a test-interface scripting language for production test and field fault isolation. Supported real-time IBM-PC based debugger used in development of MIL-1750 computer. Wrote interface between existing hardware debug package and a logic analyzer. Designed and coded a screen handling package to consolidate and speed-up screen access for debugger software.
- 1985 ~ 1986
- Principal Member of the Programming Staff
- United Technologies, Lexar Division
Bug fixes and enhancements to O/S for PBX system, including support for new disk-based file system.
- 1982 ~ 1985
- Senior Design Engineer
- United Technologies, Lexar Division
Designed and implemented cross-switch fiber-optic interface for PBX switch. Managed construction of the largest PBX switch the company ever sold as a one-off for a specific customer.
- 1985 ~ 1986
- Contract Programmer (part time)
- Questechnologies, Inc.
Developed “Sidekick-like” desktop utility program for bundling with IBM-PC clones.
- 1984 ~ 1985
- Contract Programmer (part time)
- (full time July through October 1984)
- Linknet Technologies, Inc. (now defunct)
- Digital Matrix Communications, Inc
- C-Lan Technologies, Inc.
Designed inexpensive low-speed network for IBM-PC. Wrote Z80 firmware for IBM plug-in card, network controller, and communication server. Specified “C” language utility program for mail and file access. Wrote hardware simulator module to allow concurrent hardware/software development.
- 1981 ~ 1982
- Design Engineer
- Transaction Technology, Inc.
Designed and implemented memory controller for a 14-port memory subsystem to be used as part of a new banking back-office minicomputer system.
- 1980 ~ 1980
- Design Engineer
- Magnavox, Inc. GPS Division
Designed memory / external interface card for a series of miltary GPS receivers.
- 1978 ~ 1980
- Member of the Technical Staff
- Hughes Aircraft Co, El Segundo, CA
Designed microprocessor-controlled self-test board for radar signal processing system. Wrote regression tests for and debugged hardware issues in F15/F18 radar signal processor.
Education
B.S. Electrical and Computer Engineering, June 1978
Wayne State University, Detroit, Michigan
Grade Point Average: 3.35/4.00
- Honor Societies:
- Eta Kappa Nu, Tau Beta Pi
- Logic Families:
- TTL, CMOS, ECL
- CAD/CAE Tools:
- CADAT, SilcSyn, Intelligen, Verilog-XL, Ikos, VCS, Questa-Sim
- Language Fluency:
- C++, C, Verilog, VHDL, Vscript, PL/M, Perl, Basic, Fortran
- Assembly Languages:
- 6800, 6502, 1802, 8080, 8085, Z80, 8048/49, 8086/88, 80286/386/486
Personal Data
Date of Birth: 2 March 1956 (Age: 66)
Willing to travel/relocate
References available on request
Content last updated on: 18 June 2022
An abbreviated version of this resume is also available as a PDF file.
- If you are reading a copy of this resume that was stored on a retrieval system, I would
- appreciate it if you would get the latest version from the following site:
- http://larabell.org/resume/
- Current information regarding my availability can be found at:
- http://larabell.org/wogjob/